ECE Assistant Professor Matthew Eckelman and Associate Professor Gunar Schirner have been selected to represent Northeastern University at National Academy of Engineering's seventh Frontiers of...
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- H. Tabkhi, G. Schirner "A Joint SW/HW Approach for Reducing Register File Vulnerability", ACM Transactions on Architecture and Code Optimization (ACM TACO), 2015
- N. Teimouri, H. Tabkhi, G. Schirner "Revisiting Accelerator-rich CMPs: Challenges and Solutions", Proceedings of the 52nd Annual Design Automation Conference (DAC), San Francisco, CA, 84, 2015
- H. Tabkhi G. Schirner "Application-guided Power Gating Reducing Register File Static Power", IEEE Transactions on Very Large Scale Integration (TVLSI), 22(12), 2014, 2513-2526
- J. Zhang, G. Schirner "Automatic Specification Granularity Tuning for Design Space Exploration", Design Automation and Test in Europe (DATE),
Dresden, Germany, 2014, 1-6
- G. Schirner, M. Götz, A. Rettberg, M. Zanella, F. J. Rammig. Embedded Systems: Design, Analysis and Verification, vol/lev. 403, Springer, 2013
- R. Birken, J. Zhang, G. Schirner. System Level Design of a Roaming Multi-Modal Multi-Sensor System, in Sensor Technologies for Civil Infrastructures: Performance Assessment and Health Monitoring, Ming L. Wang; Jerome P. Lynch, and Hoon Sohn (Editors), April 2014
- G. Schirner, D. Erdogmus, K. Chowdhury, T. Padir. The Future of Human-in-the-Loop Cyber-Physical Systems, IEEE Computer, vol/lev. 46, pp. 36-45, 2013
- H. Tabkhi, R. Bushey and G. Schirner. Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs, IEEE Embedded Systems Letters, 05/2014
- H. Tabkhi, R. Bushey, G. Schirner. Algorithm and Architecture Co-Design of Mixture of Gaussian (MoG) Background Subtraction for Embedded Vision, Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), Nov. 2013
- R. Bushey, H. Tabkhi, G. Schirner. Flexible Function-Level Acceleration of Embedded Vision Applications using the Pipelined Vision Processor, Proceedings of the Asilomar Conference on Signals, Systems, and Computers Nov. 2013
- J. Zhang, G. Schirner. Joint Algorithm Developing and System-Level Design: Case Study on Video Encoding, Proceedings of the International Embedded Systems Symposium (IESS), June 2013
- Y. Ukidave, A. Ziabari, P. Mistry, G. Schirner, D. Kaeli. Quantifying the Energy Efficiency of FFT on Heterogeneous Platforms, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Apr. 2013
- H. Tabkhi, R. Bushey, G. Schirner. Function-Level Processor (FLP): Raising Efficiency by Operating at Function Granularity for Market-Oriented MPSoCs, IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Zurich, Switzerland, 2014
Gunar Schirner holds a Ph.D. degree (2008) and a M.S. degree (2005) in electrical and computer engineering from the University of California, Irvine. He graduated in computer engineering from the Berufsakademie Berlin, Germany, in 1998. Prior to joining the Northeastern faculty in fall 2009, he was an assistant project scientist at the Center for Embedded Computer Systems (CECS) at the University of California, Irvine. Gunar Schirner also has 5 years of industry experience at Alcatel (now Alcatel-Lucent) where he designed distributed embedded real-time software for telecommunication products. His research interests include embedded system modeling, system-level design, and the synthesis of embedded software.
Research & Scholarship Interests
Department Research Areas
College Research Initiatives
CEE PhD student David Vines-Cavanaugh won first place for the Young Researcher Award at the International Symposium on Non-Destructive Testing in Civil Engineering (NDT-CE 2015).
ECE Associate Professors Denis Erdogmus, Gunar Schirner, & Taskin Padir awarded $603K NSF grant to develop a Hand Augmentation using Nested Decision (HAND) for those with lost limb function.
212A Lake Hall
154 Ryder Hall