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Miriam Leeser is a Professor in Electrical and Computer Engineering at Northeastern where she is head of the Reconfigurable and GPU Computing Laboratory.  She received her BS degree in electrical engineering from Cornell University, and Diploma and PhD degrees in computer science from Cambridge University in England. She was on the faculty at Cornell University's Department of Electrical Engineering before coming to Northeastern, where she is a member of the Computer Engineering research group. Her research includes using heterogeneous architectures for signal and image processing applications including wireless communications as well as implementing computer arithmetic and verifying critical applications. She is a senior member of the IEEE and of the ACM.



  • PhD, Cambridge University, 1988. Joined Northeastern in 1996.

Research & Scholarship Interests

Accelerators for compute intensive applications: reconfigurable hardware and graphics processing units (GPUs). Applications including biocomputing, machine learning, software-defined radio. Uses and implementations of computer arithmetic.
Affiliated With

Department Research Areas

College Research Initiatives

Selected Publications

Books and book chapters

V. Ross, M. Leeser, GPGPU Computing for Cloud Auditing, High Performance Cloud Auditing and Applications, Springer, November 2013

Papers in refereed conferences

P. Grossmann, M. Leeser, M. Onabajo, Minimum Energy Operation for Clustered Island-Style FPGAs, in Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays p 157-166, ACM, February, 2013

N. Moore, M. Leeser, L. S. King, Kernel Specialization for Improved Adaptability and Performance on Graphics Processing Units (GPUs), in Parallel & Distributed Processing (IPDPS), 2013 IEEE 27th International Symposium on p 1037-1048, May 2013

D. Kusinsky, M. Leeser, FPGA-based Hyperspectral Covariance Coprocessor for Size, Weight, and Power Constrained Platforms, in High Performance Extreme Computing Conference (HPEC), 2013 IEEE, p 1-6, September, 2013

X. Fang, M. Leeser, Vendor Agnostic, High Performance, Double Precision Floating Point Division for FPGAs, in High Performance Extreme Computing Conference (HPEC), IEEE, p 1-5, 2013 

See Google Scholar Profile for all publications »

Related News

September 28, 2017

ECE Professors Miriam Leeser and Stratis Ioannidis will give a joint lecture on the "Practical, Secure Function Evaluation at Scale" at the Computational Research in Boston and Beyond Seminar at MIT.

July 24, 2017

ECE Professors Stratis Ioannidis and Miriam Leeser have been awarded a $500K NSF grant to create a "Massively Scalable Secure Computation Infrastructure Using FPGAs."

June 5, 2017

ECE Professors Mitch Kokar and Miriam Leeser will work with BAE Systems on DARPA’s CONverged Collaborative Elements for RF Task Operations (CONCERTO) program. According to BAE Systems, CONCERTO...

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