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m.leeser@northeastern.edu

Profile

Biography

Miriam Leeser is a Professor in Electrical and Computer Engineering at Northeastern where she is head of the Reconfigurable and GPU Computing Laboratory.  She received her BS degree in electrical engineering from Cornell University, and Diploma and PhD degrees in computer science from Cambridge University in England. She was on the faculty at Cornell University's Department of Electrical Engineering before coming to Northeastern, where she is a member of the Computer Engineering research group. Her research includes using heterogeneous architectures for signal and image processing applications including wireless communications as well as implementing computer arithmetic and verifying critical applications. She is a senior member of the IEEE and of the ACM.

 

Education

  • PhD, Cambridge University, 1988. Joined Northeastern in 1996.

Research & Scholarship Interests

Accelerators for compute intensive applications: reconfigurable hardware and graphics processing units (GPUs). Applications including biocomputing, machine learning, software-defined radio. Uses and implementations of computer arithmetic.
Affiliated With

Department Research Areas

College Research Initiatives

Selected Publications

  • J. Bhimani, N. Mi, M. Leeser, Z. Yang, FiM: Performance Prediction for Parallel Computation in Iterative Data Processing Applications, In Cloud Computing (CLOUD), IEEE 10th International Conference, 2017, 359-366
  • J. Bhimani, Z. Yang, M. Leeser, N. Mi, Accelerating Big Data Applications Using Lightweight Virtualization Framework on Enterprise Cloud, High Performance Extreme Computing Conference (HPEC), IEEE, 2017, 1-7
  • B. Drozdenko, M. Zimmermann, T. Dao, K. Chowdhury, M. Leeser, Hardware-Software Codesign of Wireless Transceivers on Zynq Heterogeneous Systems, IEEE Transactions on Emerging Topics in Computing, 2017
  • C. Liu, M. Leeser, A Framework for Developing Parallel Applications with High Level Tasks on Heterogeneous Platforms, Proceedings of the 8th International Workshop on Programming Models and Applications for Multicores and Manycores, 2017, 74-79, ACM
  • X. Fang, S. Ioannidis, M. Leeser, Secure Function Evaluation Using An FPGA Overlay Architecture, In Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays 2017, 257-266, ACM
  • B. Drozdenko, M. Zimmermann, T. Dao, K. Chowdhury, M. Leeser, Modeling Considerations for the Hardware-Software Co-design of Flexible Modern Wireless Transceivers, 22nd International Conference on Field Programmable Logic and Applications (FPL), 2016
  • X. Fang, M. Leeser, Open-source Variable-Precision Floating-Point Library for Major Commercial FPGAs, ACM Transactions on Reconfigurable Technology Systems, 9(3), 2016
See Google Scholar Profile for all publications »

Related News

June 5, 2019

ECE Assistant Professor Xue (Shelley) Lin will lead a $1.2M NSF grant, in collaboration with ECE Professor Miriam Leeser and Massoud Pedram from the University of Southern California, on developing "A Unified Software/Hardware Framework of DNN Computation and Storage Reduction Using ADMM".

June 4, 2019

ECE Professor Miriam Leeser will give a keynote speech on "Billions and billions - or what to do with all those transistors" at the Irish Signals and Systems Conference (ISSC).

April 29, 2019

Congratulations to all the winners of the faculty and staff awards, and to everyone for their hard work and dedication during the 2018-2019 academic school year. See Full Photo Gallery Faculty Fellow...

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