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David Kaeli

COE Distinguished Professor, Electrical and Computer Engineering
Affiliated Faculty, Bioengineering
333 Dana Research Center
360 Huntington Avenue
Boston, MA 02115


David Kaeli received a BS and PhD in Electrical Engineering from Rutgers University, and an MS in Computer Engineering from Syracuse University. He is presently a COE Distinguished Processor on the ECE faculty at Northeastern University, Boston, MA where he directs the Northeastern University Computer Architecture Research Laboratory (NUCAR). Prior to joining Northeastern in 1993, Kaeli spent 12 years at IBM, the last 7 at T.J. Watson Research Center, Yorktown Heights, NY.

Dr. Kaeli is a Fellow of the IEEE and a Distinguished Scientist of the ACM. In 1996, he received the NSF CAREER Award. He is a member of Institute for Complex Scientific Software and the Institute for Information Assurance.  His Laboratory is a NVIDIA CUDA Research Center, an AMD Strategic Academic Partner, and a HSA Center of Excellence in Heterogeneous Computing.


  • PhD, Rutgers University, 1992. 

Research & Scholarship Interests

Computer architecture; GPUs; heterogeneous computing; performance analysis; security and information assurance; hardware reliability and recovery; Big Data analytics; workload characterization
Affiliated With

Department Research Areas

College Research Initiatives

Honors & Awards

  • 2009 Søren Buus Outstanding Research Award
  • National Science Foundation CAREER Award
  • Fellow, Institute of Electrical and Electronics Engineers
  • Distinguished Scientist, Association of Computing Machinery
  • Distinguished Professor, College of Engineering
  • Distinguished Professor, HSA Foundation 

Selected Publications

  • A. Jadidi, M. Arjomand, M. Tavana, D. Kaeli, M. Kandemir, C. Das, Exploring the Potential for Collaborative Data Compression and Hard-Error Tolerance in Resistive Memories, 47th IEEE/IFIP International Conference on Dependable Systems and Networks, 2017
  • X. Gong, Z. Chen, A.K. Ziabari, R. Ubal, D. Kaeli, TwinKernels: An Execution Model to Improve GPU Hardware Scheduling at Compile Time, Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017, 39-49
  • Z.-H. Jiang, Y. Fei, D. Kaeli, A Complete Key Recovery Timing Attack on a GPU, Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2016, 394-405
See Google Scholar Profile for all publications »

Related News

May 1, 2018

Congratulations to all the winners of the faculty and staff awards, and to everyone for their hard work and dedication during the 2017-2018 academic school year. Faculty Fellow Guohao Dai, BioE...

April 13, 2018

Congratulations to the Northeastern University Computer Architecture Laboratory for receiving the Best Paper Award at the 2018 ACM International Conference on Performance Engineering held in Berlin,...

April 6, 2018

Two Northeastern ECE graduate students, Kaustubh Shivdikar and Julian Gutierrez, along with external collaborator Tad Gallion and advisor Professor David Kaeli, led a team of 3 ECE undergraduates (...

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