Final Program

3rd Annual Workshop on Computer Architecture Education (WCAE-3)

February 2, 1997

The Menger Hotel, San Antonio, Texas


Held in conjunction with the

Third International Symposium on
High-Performance Computer Architecture

San Antonio, Texas - February 1 ~ 5, 1997

Organizer: David R. Kaeli, Northeastern University

Registration Information

This year's keynote speaker will be Prof. James Larus from the Department of Computer Science at University of Wisconsin-Madison.

Why Write Real Software in a University?

Computer science and computer engineering is, for the most part, the study of software. Surprisingly, most of the people who do this research have never written programs that others use ("real software"). The arguments against producing real software are painfully clear: it entails considerable work and long-term commitments. This talk focuses on the less obvious, but equally compelling arguments in favor of producing, documenting, and distributing robust, usable software as a routine part of research. In my experience, real software yields a wide range of benefits, both personal and professional, and should be the norm, rather than the exception.

Final Program

I. Introduction and Keynote (8:30 ~ 9:45am)

Keynote Talk: ``Why Write Real Software in a University?''
James R. Larus
Department of Computer Science at University of Wisconsin-Madison

II. Pipeline Simulators (10:15 ~ 12:15am)

An Interactive, Visual Simulator for the DLX Pipeline
Yiong Zhang and George B. Adams, Purdue University

Why You Should Build a Super-Scalar Pipeline Simulator
Chris C. Edmondson-Yurkanan
University of Texas at Austin

Interactive CPU Simulator for Computer Organization Instruction
Robert Hodson and James Hereford
Christopher Newport University

An Enhanced DLX-Based Superscalar System Simulator
Chung-Ho Chen and Akida Wu
National Yunlin Institute of Technology, Taiwan

III. System-level Simulators and Compilers (1:30 ~ 3:00pm)

RSIM: A Simulator for Shared-Memory Multiprocessor and Uniprocessor Systems that Exploit ILP
Vijay Pai, Parthasarathy Ranganathan and Sarita Adve
Rice University, Houston, Texas

Implementing an Experimental VLIW Compiler
Mayan Moudgill
IBM T.J. Watson Research Center, Yorktown Heights, New York

IV. Misc. Topics (3:30 ~ 5:00pm)

An Integrated Learning Support Environment for Computer Architecture
P.S. Coe, R.W. Howell, R.N. Ibbett, R. McNab and L.M. Williams
Department of Computer Science, University of Edinburgh, UK

Evaluating the Performance of Dynamic Branch Prediction Schemes with BPSim
Norman Lam, Si-En Chang and Mark L. Manwaring
Washington State University

The Alpha Tracing Toolset: ATOM and PatchWrx
David Hunter and Sharon Smith
Digital Equipment Corporation
Jason P. Casmira, John Fraser and David Kaeli
Northeastern University, Boston, MA

V. Panel Session: Topic TBA (5:00pm ~)

Registration Information

Registration - $60.00 ($72.00 on-site).
Registration includes continental breakfast and two coffee breaks.
Registration is available on the HPCA3 registration website.
Copies of papers presented at the workshop will be made available at the workshop. As in past years, the proceedings for the workshop will be published in the IEEE TCCA Newsletter or another appropriate venue.

Updated on December 23, 1996