de Alba, M. and Kaeli, D. "Characterization and Evaluation of Hardware Loop Unrolling". First Boston Area Architecture Conference, Cambridge, MA, January 30, 2003.

A. Uht, A. Khalafi, D. Morano, M. d. Alba, and D. Kaeli, "Realizing High IPC Using Time-Tagged Resource Flow Computing," in Proceedings of the Euro-Par 2002 Conference, Springer-Verlag Lecture Notes in Computer Science. Paderborn, Germany: ACM, IFIP, August 28, 2002, pp. 490-499.

de Alba, M. and Kaeli, D."Path-based Hardware Loop Prediction". In the 4th International Conference on Control, Virtual Instrumentation and Digital Systems, August 26-30, 2002. Mexico.

de Alba, M. and Kaeli, D. "Runtime Predictability of Loops." IEEE 4th Annual Workshop on Workload Characterization, held with the 34th Annual International Symposium on Microarchitecture. Austin Texas, December 1-5, 2001.

de Alba, M. Kaeli, D. and Kim, E-S. "Analysis of Dynamic Loops". In the 3rd International Conference on Control, Virtual Instrumentation and Digital Systems, August 27-31, 2001. Mexico City, Mexico.(written in Spanish).

A.K. Uht, D. Morano, A. Khalafi, M. de Alba, T. Wenisch, M. Ashouei and D. Kaeli. "Levo: IPC in the 10's via Resource Flow Computing". Presented at PACT 2001 Work-In-Progress (WIP) Session, September 2001, IEEE TCCA Newsletter, Special Issue: to appear.

A. K. Uht, D. Morano, A. Khalafi, M. de Alba, T. Wenisch, M. Ashouei and D. Kaeli. "IPC in the 10's via Resource Flow Computing with Levo". Technical Report No. 092001-001. Dept. of Electrical and Computer Engineering, University of Rhode Island, September 18, 2001.

de Alba, M. "Formal Specification and Verification of an External Memory Manager for the Mach Operating System, using the LOTOS language". MS Thesis, Monterrey Institute of Technology, Mexico City, Mexico, December 1996.

Forcada J., Petrov R., de Alba M. "Measuring the ozone layer from the Earth". Gyros Magazine, Metropolitan Autonomous University,Mexico City, Mexico, Vol. 1, No. 1, October 1994, pp. 37-43.