Dr. Zainalabedin Navabi is an adjunct professor of electrical and computer engineering at Northeastern University. Dr. Navabi is the author of the textbook, VHDL: Analysis and Modeling of Digital Systems, 1993, 1998 McGraw-Hill, and the 1999 book, Verilog Hardware Description Language: Analysis and Design of Digital Systems. Since 1981, Dr. Navabi has been involved in the design, definition and implementation of Hardware Description Languages (HDL). He has written numerous papers on the application of HDLs in simulation, synthesis and test of digital systems. He started one of the first full VHDL courses at Northeastern University in 1989. Since then he has conducted many short courses and tutorials on this subject in the United States and abroad. In addition to being a professor, he is also a consultant to CAE companies. Dr. Navabi received his Ph.D. from the University of Arizona in 1981. He is a senior member of IEEE, and a member of IEEE Computer Society, ACM, ASEE and Euromicro.
 

 This series of VHDL training courses aims to teach the design and implementation of digital systems. The first course presents basics and elements of VHDL through use of simple examples at structural, dataflow and behavioral levels of abstraction. This course includes an online demonstration of a VHDL simulator and a VHDL synthesis tool. The second course shows how VHDL can be used in a top-down design process. The use of VHDL simulation for high-level design verification and implementation correctness will be emphasized, and online simulation of a top-down design using a commercial VHDL simulator will be demonstrated. The third course presents VHDL from a synthesis point of view. In this part, a complete digital system will be described and synthesized into simulatable library components. Using a commercial synthesis tool, an online demonstration shows steps that are involved in synthesizing with VHDL.