Homepage is updated!

(Jan. 30, 2008)

New Lab homepage is opened!  (August. 03, 2005)

Welcome to HPVLSI Lab.

The complexity of today's VLSI systems requires new design methods. The research of the HPVLSI group focuses on methods and tools for the design of high-speed and low-power Digital /Analog Integrated Circuits.

The objectives of the research are

Clocking scheme for high performance VLSI systems including on-chip    clock skew analysis and clock distribution

High speed integrated circuit signal integrity and physical CAD tool    development

Low power and high speed circuit design methodology and technology

Deep sub-micron device phenomena

High speed system integration for signal processing and  

   communication applications

Innovative circuits and system application

Merged DRAM logic technology

Prof. Yong-Bin Kim
Zraket Endowed Professor
Department of Electrical and Computer Engineering
Office: 327 Dana Research Center
Phone: (617) 373-2919
Fax: (617) 373-8970
Email: ybk@ece.neu.edu