Social media, e-commerce, cloud computing, gaming, and most recently artificial intelligence all rely more heavily on computing power in data centers, where server processors, memories and FPGA circuits demand increasing load current with fast slew-rate and are powered by interleaved multiphase synchronous buck converters. High efficiency is the most important requirement on power converters in data centers because of operational cost associated with power consumption and cooling system.
Small size is another critical requirement due to large number of servers packed in the data centers.
Intel processors and semiconductors have been following Moore’s Law for decades, and therefore, semiconductor devices have shrunk rapidly. However, the volume of inductors has not followed Moore’s Law, and inductors currently dominate the size of power converters.
Both the mitigation and utilization of inductor coupling are addressed in the dissertation. The design guidelines are established to minimize unwanted inductor coupling in computer systems based on magnetic simulation and experiment. To utilize the inductor coupling effect, a lateral single-turn coupled-inductor structure is developed to reduce winding loss and makes it possible to utilize ferrite magnetic material with low core loss. The inductor structure is suitable for high-current and fast load slew-rate applications and can be either embedded between PCB layers of motherboards and POL modules, or co-packaged with loads, such as processors and FPGAs. Multiphase POL modules are built to demonstrate operation of the new coupled-inductor structure and to improve power density of the POL modules.
- Professor Bradley Lehman (Advisor)
- Professor Vincent Harris
- Professor Mahshid Amirabadi