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ECE MS Defense: "An Ultra Low Power Voltage Reference using Charge-pump and Switched Capacitor Network," Shikhar Tewari


ISEC 432

August 10, 2018 2:00 pm
August 10, 2018 2:00 pm

With millions of new Internet of Things (IoT) devices getting interconnected in the existing network, operating IoT systems on harvested energy is the only feasible option to eliminate the cost of millions of battery replacements. Operating IoT systems by harvesting energy from available ambient source necessitates ultra low power (ULP) consumption of all new IoT systems, which are made up of a number of different analog/mixed signal blocks. An essential element of all these analog/mixed signal blocks is a stable and precise voltage reference.

The thesis presents an ultra-low power sub-bandgap voltage reference implemented on 130nm BiCMOS process. It consumes 32.8nW, and is operational from 600mV supply. The design uses charge-pumps to bias parasitic Bipolar Junction Transistors (BJTs) and generate a reference voltage at the output of a switched capacitor network. Use of BJTs ensures less drift in the reference voltage across process corners when compared to other CMOS-only voltage references also consuming ultra-low power. The voltage reference of 500mV is achieved with a temperature variation of 46ppm/0C, and PSRR of -59dB at DC using current source architecture. The circuit has an area of 0.0436mm2. The design also incorporate trimming circuits for process variation and a temperature based trimming scheme to reduce the temperature variation of the reference voltage. The thesis also presents a switched capacitor based reference voltage scaling circuit, to provide dynamic voltage scaling (DVS) capabilities.

  • Professor Aatmesh Shrivastava (Advisor)
  • Professor Marvin Onabajo
  • Professor Yong-Bin Kim