ECE 1406  Integrated Circuit Fabrication

Spring 2003, M, T, Th*:  2:50-3:55, 11 SL, Lab 448 Egan.

* 2 lectures/week averaged over quarter, lab hours arranged.


Nick McGruer            Office:            326 Dana                  

                                    Phone:            (617) 373-2066                     FAX  (617) 373-8970

                                    Hours:  TBD, or by appointment, phone, or e-mail.


Text:               Introduction to Microelectronic Fabrication, Modular Series on Solid State Devices, Second Edition, R.C. Jaeger.




  1. VLSI Fabrication Principles, Ghandhi.  Better explanations in some areas; diffusion, for example.


2.     Silicon Processing for the VLSI Era, Volumes I and II, Wolf and Tauber. (industry viewpoint, very detailed)


3.     Solid State Electronic Devices, Streetman.  Standard device reference.



Grading:              Quizzes 33%, Homework and Projects 33%, Lab 34%.



OVERVIEW:            This course provides an overview of integrated circuit fabrication from the viewpoint of the process engineer.  The lecture and laboratory portions of the course are taught together as one course, each designed to be about one half of the 4 quarter hour course.  The primary content of the course is the technology, chemistry, and physics of integrated circuit fabrication, including the factors shaping the future of the industry.  The industry-standard process simulator SUPREM-IV will be used to supplement analytical process models.  MOS device theory will be applied in interpreting results of testing the integrated circuits fabricated in the lab.  Because of time constraints, the course concentrates on silicon IC technology, but the material covered is applicable to other materials systems and microstructures including compound semiconductor devices, and microelectromechanical (MEMS) technologies used to build devices such as accelerometers, pressure sensors, and switches for telecommunications.


ECE 1406 Course Outline



Primary Goals

Text Reference



Overview, Scheduling, PMOS process description.

Schedule labs, understand course structure.




Safety, Clean Room, Sheet Resistance, Introduction to Microfabrication, Silicon Oxidation.


Understand safety and cleanroom procedures. SAFETY/ CLEANROOM QUIZ.  Ability to predict silicon and SiO2 topographies.  Understand and use sheet resistance concept.

Notes, Chapter 1, Ch. 3.

Field Oxidation


Silicon Oxidation, Lithography.

Multiple oxidations, Predict photoresist response to light given sensitivity and contrast.

Ch. 3,

Ch. 2.

Active Area Mask


Lithography, Etch.

Understand image formation, process latitude.Dry and wet etch techniques.

Ch. 2.

Gate Oxidation


Etch, Thin film deposition.

Etch profiles, and overetch concepts.  Understand fundamentals of CVD.

Ch. 6.3, especially 6.3.1 and 6.3.2

Poly Dep/ Mask/ Etch


Ion Implantation, Diffusion, Masking, Junction Depth.

Ability to compute concentration profiles for ion implantation and junction depths. 

Ch. 5, Ch. 4.

Ion Implant, Drive-in, Contact Mask


Multilevel Metallization

Metal thicknesses for simple deposition geometries.  Familiarity with several deposition methods, and electromigration failure of conductors, Modern Multilevel Metallization

Ch. 7.

Metal Deposition, Anneal



Ability to use MOS measurements to calculate doping, threshold voltage, oxide charge, and mobility from device measurements.

Ch. 9 through 9.1.9.



Device, Chip, and Interconnect Scaling

Physical and technology drivers of IC industry future. 

Ch. 9.1.10, Notes.



Process Integration, Yield

Understand fabrication processes for CMOS devices.

9.3, parts of 11 and 8