1)  An integrated circuit fabrication step requires the implantation of phosphorus in boron-doped Si (N_A=10¹⁵ cm^-3).  The maximum phosphorus concentration should be 10¹⁷ cm^-3 at a depth of x=100 nm from the silicon surface.

a)  Find the required implant energy and dose

b)  How thick should the implant mask be fabricated so that the underlying boron-doped Si is not electrically affected by the implant if the mask is...
   i)  AZ111 photoresist
   ii) SiO₂

c)  Describe a post-implant anneal (time and temp) that will repair the Si damage and activate the P with minimal dopant redistribution

d)  Create and run a tsuprem4 simulation (in 2 dimensions) to check the accuracy of parts a, b(ii), and c.
 

Problems from Chapter 5:

2)  Problem 3

3)  Problem 6
 

Research Paper:

Write a concise research paper on one of the following state-of-the-art topics:

• ultra thin gate oxide fabrication
• shallow ion implantation
• rapid thermal annealing (for ultrashallow junctions)
• high energy implantation (for n- and p-well formation)
• plasma immersion ion implantation

The text must be written in your own words. Direct quotations from the journal articles are discouraged, but must be enclosed in quotation marks and properly referenced.

Please attach copies of the cited journal articles to your paper.

I would estimate that your papers should be at least two double-spaced pages in length, but not over six pages.