A partial cross section of the CMOS process used in most digital integrated circuits is shown to the right. The transistors consist of a gate (G), source (S), and drain (D) region. The precise functionality of the circuit depends on the interconnection of millions of transistors. The interconnects consist of metal lines separated by interlayer dielectrics (ILD). The lateral lines are connected by vertical vias. As the lateral dimensions shrink in future generations of chips, the vias become narrower while the depth of the vias remains approximately constant. One of the challenges of IC fabrication is to fill deep, narrow vias with metals and nitrides.