• Haldun Hadimioglu, Polytechnic University, haldun@photon.poly.edu
• David Kaeli, Northeastern University, kaeli@ece.neu.edu
• Jeff Kuskin, Atheros, jsk@atheros.com
• Ashwini Nanda, IBM TJ Watson Research Center, ashwini@watson.ibm.com
• Josep Torrellas, University of Illinois at Urbana-Champaign, torrellas@cs.uiuc.edu

This workshop combines two existing workshops (Scalable Shared Memory Multiprocessors and Solving the Memory Wall). The goal of this new workshop is to provide a forum for researchers and practitioners from industry and academia to discuss advances in technology, architecture, and algorithms that address the need for scalability in multiprocessors and the growing gap between CPU/network and memory speeds. Both hardware and software approaches to addressing scalability and speed disparities are encouraged. We are especially interested in attracting new, experimental or paper techniques, technologies and algorithms that address these issues.

Dr. Basil Smith's talk on Memory-Centric System Design is available here in PDF.